1. Field of the Invention
The present invention relates to a display device and an electronic apparatus comprising the display device and drive control method for the display devices. More particularly, the present invention relates to an electronic apparatus, for example a cellular telephone (cell-phone), portable telephone, etc. comprising a display device and associated display device comprising two or more display panels and a drive control method thereof.
2. Description of the Related Art
During the last decade, proliferation of digital information equipment, such as personal computers, digital cameras, cellular telephones, DVD recorders, etc. has been unprecedented. In such digital information equipment, a display device is supplied for displaying various kinds of image information, the current operational state, etc.
For instance, at present the majority of cellular telephones have evolved into a foldable type case structure (clamshell-type) Also, many mainstream cellular telephone handsets of this style comprise two display panels installed back to back in the upper portion of the telephone: a relatively large main display formed in the primary operation functions surface side facing inwards (case inner surface) and a comparatively smaller sub-display that faces outwards (case outer surface).
Here, a conventional prior art display device comprised with two display panels will be explained.
FIG. 7 is an outline configuration diagram showing an example of a conventional prior art display device comprised with two display panels.
As seen in FIG. 7 and like the above-mentioned cellular telephone, this configuration is comprised with a relatively large main display and a comparatively smaller sub-display. Also, the configuration illustrates two display panels in which the display pixels are arranged in a two-dimensional array and applied to a liquid crystal display panel corresponding to an active-matrix driving method.
The conventional prior art display device, for example as shown in FIG. 7, has a configuration comprised with at least two varieties of display panels PNL1, PNL2 arranged in parallel with a different number of scanning lines; a gate driver GDR (scanning driver) which sequentially applies a scanning signal to each scanning line group SLm, SLs arranged in the row direction of each display panel PNL1, PNL2; a source driver SDR (data driver) which applies a display signal (for example, display signal voltage corresponding to a luminance signal) to the data line group DLm arranged in the column direction of the display panel PNL1; and common voltage generation sections COM1, COM2 (common electrode driver section) which apply a common signal voltage Vcom1, Vcom2 to a common electrode (omitted from diagram) provided in each display panel PNL1, PNL2.
Here, for example, the two display panels PNL1, PNL2 are different in panel size. In the configuration among the data line group DLm which extends from the source driver SDR in the display panel PNL1, a portion of the data line group DLs passes through the display panel PNL1 and leads to the display panel PNL2. Basically, in this arrangement the data line group DLs is shared by the two display panels PNL1, PNL2. For instance, an example is shown in FIG. 7. In the display panel PNL1 the number of scanning lines is 240 and the number of data lines is 528 (176×3 (RGB)). In the display panel PNL2 the number of scanning lines is 64 and the number of data lines is 264 (88×RGB). Among the data line group DL1˜DL528 which extend from the source driver SDR, the data line group DL1˜DL264 has a configuration shared by the two display panels PNL1, PNL2.
Also, in the display device shown in FIG. 7 for example even though a configuration in the case of two different panel sizes (the number of scanning lines) is illustrated, the display device may also be comprised of two display panels of the same panel size.
Furthermore, as seen in FIG. 7, the gate driver GDR has a single driver chip structure, but it can also have a distinct driver chip structure corresponding to each scanning line group SLm, SLs arranged in the display panels PNL1, PNL2. Specifically, the structure has to be able to apply a sequential scanning signal to all of the scanning lines in plural stages by way of the shift signal generation component provided in the gate driver GDR.
Moreover, the common voltage generation sections COM1, COM2 apply common signal voltages Vcom1, Vcom2 to the common electrode of each display panel PNL1, PNL2 and as seen in FIG. 7 may have a configuration formed separately so as to correspond to each of the display panels PNL1, PNL2. On the other hand, separate common signal voltages Vcom1, Vcom2 may also be applied to each display panel PNL1, PNL2 from a single common voltage generation section.
FIG. 8 is a timing chart showing an example of the display drive control method in a conventional prior art display device.
The display drive control method in the above-mentioned display device, for example as shown in FIG. 8 exemplifies 1vertical scanning period of 1 frame period. Initially, scanning drive for the scanning signals S1˜S64 is sequentially applied from the gate driver GDR to the scanning line group SLs (SL1˜SL64) of the display panel PNL2 used for the smaller panel size. As this timing synchronizes and after supplying the display signals D1˜D264 from the source driver SDR to the data line group DLs (DL1˜DL264) corresponding to each row of the display panel PNL2 and writing the display pixels of each row, subsequent scanning drive for the scanning signals S65˜S304 is sequentially applied to the scanning line group SLm (SL65˜SL304) of the display panel PNL1 used for the larger panel size. As this timing synchronizes and by supplying the display signals D1˜D528 from the source driver SDR to the data line group DLm (DL1˜DL528) corresponding to each row of the display panel PNL1 and writing the display pixels of each row, the desired image information is displayed on each of the display panels PNL1 and PNL2. Specifically, in the display drive control method shown in FIG. 8, after writing the display data to the display panel PNL2, a series of display drive control operations is sequentially performed which writes the display signal to the display panel PNL1 in 1 frame period as 1 cycle. Accordingly, within a 1 frame period, separate operation periods (individual display periods) perform the display drive of each display panel PNL1, PNL2 in chronological order (serial).
Furthermore, in the display drive control method shown in FIG. 8 the display signal is sequentially written to the display panels PNL2 and PNL1 in a 1 frame period of 1 cycle. This case example is implemented with a frame reversal drive method (also commonly known as a frame-inversion drive method) which performs reversal control of the signal polarity (polarity reversal) in the common signal voltage Vcom (Vcom1, Vcom2) for every 1 frame period. As is generally known in such a frame reversal drive method, the voltage polarity applied to the liquid crystal molecules (pixel capacitance) of the display pixel configuration readily produces degeneration of the liquid crystals or seizing, the display image quality tends to deteriorate by flickering, etc. as a result of being maintained at a specific polarity for a relatively lengthy interval of a 1 frame period. Therefore, as a display drive control method for controlling such phenomena in addition to the frame reversal drive method, a line (row) reversal drive method (also commonly known as row-inversion drive method) is applied in many cases which reverses (inverts) the signal polarity of the common signal voltage for each scanning line.
FIG. 9 is a timing chart showing a case of performing display drive with a conventional prior art display device by line reversal drive method and frame reversal drive method.
Here, with regard to the above comparative relationship with the embodiments of the present invention described later, a case will be explained in which after the display signal is written to the display panel PNL1, the display signal is written to the display panel PNL2 in a 1 frame period of the display device shown in FIG. 7. Also, while having 320 scanning lines for the display panel PNL1 and 160 scanning lines for the display panel PNL2, this instance consists of the same number of data lines.
Specifically, as shown in FIG. 9 for example, first in the PNL1 display available period within a 1 frame period and by way of the gate driver GDR, after scanning from the 1st row thru the 320th row in the display panel PNL1, the PNL2 display available period from the 1st row thru the 160th row is scanned in the display panel PNL2. Also, while the display signal is simultaneously supplied via the data lines by way of the source driver SDR and synchronizing with the scan timing T1, T2, . . . , T480 (horizontal scanning period) of each row (scanning lines), reversal control of the signal polarity for the common signal voltages Vcom1, Vcom2 is carried out for each scan timing of each row. Furthermore, reversal control of the signal polarity (polarity reversal) in the relevant common signal voltages Vcom1, Vcom2 is performed for every 1 frame period. Accordingly, the number of scanning lines in the common signal voltages Vcom1, Vcom2 together constitute substantially 480 lines (=320 lines+160 lines) which represent the total number of scanning lines in each display panel PNL1, PNL2. The reversal drive performed in the display panels during driving cycles (frequency rate of repetition) is equivalent to the cases of line reversal drive and frame reversal drive. In addition as seen in FIG. 9, BP (back portion) is a non-display period from vertical synchronization timing (start timing of a 1 frame period) to a display available period of the display panel PNL1. MP (middle portion) is a non-display period from a display available period of the display panel PNL1 to a display available period of the display panel PNL2. FP (front portion) is a non-display period from a display available period of the display panel PNL2 to the next vertical synchronization timing and indicates what is known as a vertical retrace line period.
Parenthetically, in a cellular telephone which has two display panels, an image can only be viewed on one of the display panels (for example, the main display) at a time and nothing can be viewed on the other side display panel (for example, the sub-display) because the opposite side display panel is shifted to a non-display state. In this case, each display panel is set to a line reversal drive and a frame reversal drive method even though one of the display panels is actuated in a display state and the display panel on the opposite side is shifted to a non-display state. The reversal drive of the common signal voltage applied to the common electrode of the display panel in a non-display state cannot be discontinued. Thus, it is essential to maintain the reversal drive of the common signal voltage applied constantly to the common electrode of both display panels.
In order to lower power consumption in the display panel of the opposite direction in a non-display state, when reversal drive of the common signal voltage supplied to the common electrode of the relevant display panel is discontinued, the electric charge stored in the display pixels in the previous display state leaks gradually via an electrostatic protection device. As a result, streak-like “noise” may be generated in the display screen in proportion to the amount of variation of this leak and the display state becomes distorted (smeared). Also, based on the electric charge stored in the display pixels, the liquid crystals tend to deteriorate by continuously applying constant polarity voltage to the liquid crystal molecules for a relatively lengthy period.
Thus, in a display device which has two display panels, even if the display panel of one direction is actuated in a display state and the display panel of the opposite direction is shifted to a non-display state, common signal voltage is always applied to both display panels. Since it is necessary to perform reversal drive by predetermined cycles for reversal drive control of the common signal voltage, there is a drawback in that power consumption increases.